TY - GEN
T1 - Parameter Estimation over Wired Networks with Time-Delay and Packet Collision
AU - Arancibia, Felipe
AU - Carvajal, Rodrigo
AU - Agoero, Juan C.
N1 - Publisher Copyright:
© 2019 IEEE.
PY - 2019/11
Y1 - 2019/11
N2 - In this paper, we address a parameters estimation problem of a dynamic system using an Output Error model, in which the output signal is transmitted through wired networks. We consider that the wired network may cause unknown delays and collision packet in data. We use the Akaike information criterion to estimate the time delay caused by wired network. Furthermore, due to the packet loss caused by wired network, we use Expectation Maximization algorithm to estimate the dynamic system parameters. Finally, we test the proposed algorithm effectiveness with numerical examples and a sensitivity analysis.
AB - In this paper, we address a parameters estimation problem of a dynamic system using an Output Error model, in which the output signal is transmitted through wired networks. We consider that the wired network may cause unknown delays and collision packet in data. We use the Akaike information criterion to estimate the time delay caused by wired network. Furthermore, due to the packet loss caused by wired network, we use Expectation Maximization algorithm to estimate the dynamic system parameters. Finally, we test the proposed algorithm effectiveness with numerical examples and a sensitivity analysis.
KW - Expectation Maximization
KW - Information criterion Akaike
KW - Output Error
KW - Packet Collision
KW - Parameter estimation
KW - Time-delay system
UR - http://www.scopus.com/inward/record.url?scp=85081047002&partnerID=8YFLogxK
U2 - 10.1109/CHILECON47746.2019.8987445
DO - 10.1109/CHILECON47746.2019.8987445
M3 - Conference contribution
AN - SCOPUS:85081047002
T3 - IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2019
BT - IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2019
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2019 IEEE CHILEAN Conference on Electrical, Electronics Engineering, Information and Communication Technologies, CHILECON 2019
Y2 - 13 November 2019 through 27 November 2019
ER -